The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometric size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This down-scaling process generally provides benefits by increasing production efficiency and lowering associated costs. Such down-scaling has also increased the complexity of processing and manufacturing ICs and, in order to realize these advances, corresponding developments in IC processing and manufacturing are needed. As the dimensions of transistors decrease, the thickness of the gate oxide must be reduced to maintain performance with the decreased gate length. High dielectric constant (high-k) gate insulator layers may be used to reach larger physical thickness while keeping the same effective capacitance provided by other gate insulator layers, such as typical gate oxides.
As technology progresses, in some IC designs, there has been a desire to replace typical poly-silicon gate electrodes with metal gate (MG) electrodes so as to improve device performance. One process of forming the MG electrode is termed “gate last” process, as opposed to another MG electrode formation process termed “gate first.” The “gate last” process allows for a reduced number of subsequent processes, including high temperature processing, that must be performed after the formation of gates.
Additionally, it is important to reduce the number of malfunctioning devices per manufactured wafer in order to improve yields.